CVE-2026-89916

9.3 CRITICAL

Published 2026-09-16 · Updated 2026-09-16

AI risk analysis

Summary: This vulnerability in the Linux kernel's KVM arm64 implementation allows a virtual CPU (vCPU) to encounter an invalid TLB entry due to concurrent modifications, potentially leading to data corruption or execution of malicious code within the virtualized environment.
Exploitability: Exploitation requires concurrent access to the same virtual memory page by multiple vCPUs, making it moderately difficult. Precondition is the presence of multiple vCPUs and concurrent execution.
Blast radius: If exploited, this could lead to data corruption, execution of arbitrary code, or loss of system integrity within the virtualized environment.
Detection: No reliable host or network indicator is derivable from the published description.
Prioritized remediation: Upgrade to the specific version 6.1-rc7 or later, as published in the advisory.

kernelvirtualizationmmuvcpu

Analysis generated locally by qwen2.5:7b-instruct (no data left the box). AI-assisted — verify against primary sources before acting.

NVD description

In the Linux kernel, the following vulnerability has been resolved: KVM: arm64: Make VNCR invalidation participate in MMU invalidation retry A VNCR TLB invalidation can occur on one vcpu while another vcpu is faulting in this same page. Without correctly handling this, we can end up with the following scenario: - vcpu A walks the PTs to translate VNCR - before vcpu A is able to grab the MMU lock to insert the TLB, vcpu B updates the S1 PTs with an invalid entry, and issues a TLBI S1E2 for this VA - vcpu A inserts the TLB for something that is now invalid This isn't a new problem, and we manage S2 by having the MMU notifier to bump up mmu_invalidate_seq on invalidation so that the fault can be replayed. We can perform something similar here, and extend invalidate_vncr_va() to update the same counter, clearly indicating that the context has changed under our feet. This is safe as the invalidation always happen while holding the MMU lock for write, and that we sample the sequence number before walking S1.

CVSS vector

CVSS:3.1/AV:L/AC:L/PR:N/UI:N/S:C/C:H/I:H/A:H

All references

Source data: NVD (nvd.nist.gov), public domain. Exploit-DB.ai adds local AI analysis for defensive use only.

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